MIRACLE RFFE Module DevKit
Experience your own MIRACLE
The MIRACLE RFFE Module DevKit enable you to evaluate the performance of our unique transceiver modules in a laboratory setting.
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- MIRACLE DevKit RF board
- MIRACLE DevKit power board
- Power supply connector
- 2x standoffs and 2x hex nuts
- SD card
- Digital baseband input to RF power output integrated module
- 600-4200MHz dynamic tuning range
- Peak output power:
- High transmitter efficiency: 30dBm LTE downlink consumes 2WDC
- Modulation agnostic:
5G-NR, 4G-LTE 256QAM, 16384-
QAM, 3G-WCDMA, GMSK
- 12-bit complex data ports
- SPI control interface
The Eridan MIRACLE is an integrated transceiver module that delivers mobile communication signal power at unprecedented system efficiency and “any signal at any frequency at any time” flexibility. It delivers up to 5W peak RF output, rapidly tunes over a frequency range of 600-4200MHz, and meets the 3GPP specification for all communications protocols (both uplink and downlink). MIRACLE delivers this capability with an average signal efficiency of 40-60%. Average signal efficiency is the full DC-to-RF signal conversion efficiency of the module (digital input to power RF output), less the system power, PSYS. This is measured by dividing the TX output power by the power consumed by the subsystems highlighted in blue in the block diagram above.
MIRACLE TX is a digital sampling radio that takes baseband complex data as input and transforms it to the polar domain; this can also be described as converting I and Q into amplitude and phase. The switch-mode amplitude modulator uses the baseband amplitude signal to create the envelope of the RF output. The baseband phase signal is upconverted to the carrier frequency. The switch-mode mixer-modulator (SM3) uses this phase-modulated carrier signal to sample the envelope signal; hence the term “digital sampling radio.” This process directly synthesizes the modulated RF waveform at power and eliminates the need for traditional linear power amplifiers.
The RX on MIRACLE DevKit is an Analog Devices AD9361. The AD9361 is configured for 2 RX using the RX1A and RX2A ports. The TX functionality on this device is disabled. The digital RX output signals from the AD9361 are routed directly to the FMC connector, while the control signals are routed through the on-board FPGA. The SPI interface control logic (register address space, commands, etc) for the AD9361 is preserved in this pass-through configuration. Please see the AD9361 datasheet for details on RX performance.
DevKit interfaces with a Xilinx ZC706 evaluation platform over a the LPC FMC connector, providing a 12-bit DDR interface for the TX and RX data and a 4-wire SPI bus for control. The DevKit contains an SD card (to be inserted into the ZC706) with a wide range of test data signals including all of those shown on this data sheet. The user must provide their own ZC706. MATLAB scripts for various commands to the ZC706 over a serial communications interface are available with the DevKit, and on GitHub.